Does logical error suppression continue exponentially to large code distance?
This text mentions work from 2024 on. Those parts were partly written without a live literature search and have not been checked by an editor yet.
In plain words
Recent chips showed that enlarging an error-correcting code cuts the error rate by a constant factor at each step. It is unknown whether this continues to the much larger codes that useful computations need, or whether rare correlated events set a floor.
Precise statement
For surface-code memories on superconducting hardware, the logical error per cycle is modeled as $\epsilon_L(d) \sim A \Lambda^{-(d+1)/2}$ with code distance $d$; Google Quantum AI (Nature 638, 920, 2025, arXiv:2408.13687) reported $\Lambda$ of about 2.1 up to $d = 7$. Determine whether this law holds to $d \ge 15 \text{ and } \epsilon_L \le 10^{-10}$ per cycle, or whether correlated, leakage or drift events produce a floor; the answer is the measured $\epsilon_L(d)$ curve or a validated model of its floor.
What would settle it
Surface-code memory experiments at $d \ge 15$ with logical error rates measured down to $10^{-10}$ per cycle, or an identified error mechanism that provably caps suppression.
Status in the literature
Unverified note: it names recent work and was partly written without a live literature search; it awaits a check by an editor.
In the same 2025 work, repetition codes up to $d = 29$ reached a logical-error floor near $10^{-10}\ \text{per cycle}$ (approximate), set by rare correlated events occurring about once per hour.
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